This page contains the details of a project being undertaken by David Fry and me to build a modern version of the Microtan 65 system.
Many of the items developed are available for purchase at the shop here
The PCBs are being developed using KiCad (kicad-pcb.org).
The KiCad project files have been archived in the ZIP files in the relevant sections below and include the Gerber files for PCB production.
Bare MT65-R CPU v1.0b PCBs are available for sale in the Shop
Character Generation EPROM
The character generator map is burned into a 4k (2732) EPROM with either the upper 2k being the inverse (Rev1).
Rev 1 code Binary Image
or with the upper 2k being identical to the lower 2k (Rev2).
Rev 2 code Binary Image
Note: The FORTH programs require Rev2 code for its 'Words' to be displayed correctly. This is
because the 6502 code stores Words with the 8th bit of the last character set to denote the end of the word.
This is a modern replacement for Tangerine's Tanex card.
It is fully compatible with the original and has the following specification:
A single AS6C1008 (128kx8) SRAM chip providing 64K memory ($400-$EFFF addressable).
2 x 27512 EPROMs providing 8 pages of 12K EPROM to overlay $C000-$EFFF RAM memory space.
A single (user-selectable) IO memory location provided for selecting EPROM Memory Page
to overlay $C000-$EFFF memory space or to leave this space as RAM. Default is EPROM Memory
Page 0. LED indication of selected memory bank.
2 x 16V8 GAL chips used for SRAM addressing and EPROM port addressing/bank selection.
2 x 6522 VIAs unchanged providing 4 parallel ports. Four 8 x 2 IDC Header connectors
to be used.
UART 6551 unchanged providing TTL level RS232 serial IO. Full 'true' RS232 level serial IO
also provided by MAX238 chip - selection by jumper. IDC Header connector to be used.
(Note: 20mA Loop circuitry is not retained)
Cassette Tape interface using 2 x LM358 but using Oric Tape interface design.
5 way 180 deg DIN socket connector (same as on Micron Front Panel).
Data buffering using 2 x 74LS244 chips.
Accepts TANBUS DMAREQ signal and drives TANBUS DMAGNT and ABE signal lines. Generates TANBUS ROME, RAME and IOE signals.
Note: UART 6551 may be substituted with 65C51 in PCB versions 1.0b and above.
Modern replacement for the Tangerine High Resolution Graphics (HRG) board.
Provides 256x256 pixel high resolution graphics screen. When used with the
HRG Toolkit can also provides a 51 character x 45 line high-resolution text screen.
Modulated UHF and composite video outputs available.
What started life as a bespoke 19 inch 4U system rack has been modified to accommodate the Microtan
Circuit Boards and fit into my existing Vero 19 inch enclosure.
This involved removing the end plates, cutting them down to size and re-drilling the holes for the screws
that hold the 6 longitudinal rails in place.
The motherboard has been designed to accommodate CPU, TANEX and 5 expansion slots.
The slots are 1 inch apart to allow for a wider PCB form factor and increased cooling.
Tanbus expansion slot signal lines 19b and 19b have been earmarked for Video1 and Video2 signal.
Each may be configured by on-board jumpers to link to Tanbus CPU slot signal lines 20a or 20b.
The first production run has been completed and one of the first-offs has been installed in the System Rack.
This is being used to test and repair a number of Microtan boards.